Reference

Zilog Z80N

22 mnemonics, 30 encoded forms, operands little-endian. Generated from crates/isa/src/z80.rs.

Cycle counts show the base cost; +p is an extra cycle when an indexed access crosses a page boundary, +t when a branch is taken.

SWAPNIB

Swap the nibbles of A

Mode Opcode Operands Bytes Cycles Flags
ED 23 — 2 8 —

MIRROR

Mirror the bits of A

Mode Opcode Operands Bytes Cycles Flags
A ED 24 — 2 8 —

TEST

AND A with n, set flags only

Mode Opcode Operands Bytes Cycles Flags
n ED 27 imm8 3 11 SZHPNC

BSLA

Barrel shift left arithmetic

Mode Opcode Operands Bytes Cycles Flags
DE,B ED 28 — 2 8 —

BSRA

Barrel shift right arithmetic

Mode Opcode Operands Bytes Cycles Flags
DE,B ED 29 — 2 8 —

BSRL

Barrel shift right logical

Mode Opcode Operands Bytes Cycles Flags
DE,B ED 2A — 2 8 —

BSRF

Barrel shift right feed

Mode Opcode Operands Bytes Cycles Flags
DE,B ED 2B — 2 8 —

BRLC

Barrel rotate left circular

Mode Opcode Operands Bytes Cycles Flags
DE,B ED 2C — 2 8 —

MUL

8x8 multiply D*E into DE

Mode Opcode Operands Bytes Cycles Flags
ED 30 — 2 8 —
D,E ED 30 — 2 8 —
DE ED 30 — 2 8 —

ADD

Add (Z80N)

Mode Opcode Operands Bytes Cycles Flags
HL,A ED 31 — 2 8 —
DE,A ED 32 — 2 8 —
BC,A ED 33 — 2 8 —
HL,nn ED 34 imm16 4 16 —
DE,nn ED 35 imm16 4 16 —
BC,nn ED 36 imm16 4 16 —

PUSH

Push a 16-bit immediate

Mode Opcode Operands Bytes Cycles Flags
nn ED 8A imm-be16 4 23 —

OUTINB

Output (HL) to port (C), inc HL

Mode Opcode Operands Bytes Cycles Flags
ED 90 — 2 16 —

NEXTREG

Set a Next hardware register

Mode Opcode Operands Bytes Cycles Flags
n,n ED 91 imm8, imm8 4 20 —
n,A ED 92 imm8 3 17 —

PIXELDN

Advance HL to the next pixel row

Mode Opcode Operands Bytes Cycles Flags
ED 93 — 2 8 —

PIXELAD

Compute pixel address into HL

Mode Opcode Operands Bytes Cycles Flags
ED 94 — 2 8 —

SETAE

Set A to the E pixel mask

Mode Opcode Operands Bytes Cycles Flags
ED 95 — 2 8 —

LDIX

Block load (transparent), inc

Mode Opcode Operands Bytes Cycles Flags
ED A4 — 2 16 —

LDWS

Load word, special

Mode Opcode Operands Bytes Cycles Flags
ED A5 — 2 14 —

LDDX

Block load (transparent), dec

Mode Opcode Operands Bytes Cycles Flags
ED AC — 2 16 —

LDIRX

Repeat LDIX

Mode Opcode Operands Bytes Cycles Flags
ED B4 — 2 16 +t —

LDPIRX

Repeat LDIX over a pattern

Mode Opcode Operands Bytes Cycles Flags
ED B7 — 2 16 +t —

LDDRX

Repeat LDDX

Mode Opcode Operands Bytes Cycles Flags
ED BC — 2 16 +t —

Machines

Sinclair ZX Spectrum, Amstrad CPC, MSX, NEC PC-8801, Sega Master System

Sources

Encodings on this page were taken from:

  • Programming the Z80, 2nd edition — Rodnay Zaks, 1980
  • Z80 Microcomputer Handbook — Sams, 1985