Hudson HuC6280 (extension)

73 mnemonics, 83 encoded forms, operands little-endian. Generated from crates/isa/src/huc6280.rs.

Cycle counts show the base cost; +p is an extra cycle when an indexed access crosses a page boundary, +t when a branch is taken.

SAX

Swap A and X

Mode	Opcode	Operands	Bytes	Cycles	Flags
implied	`22`	—	1	2	NZ

SAY

Swap A and Y

Mode	Opcode	Operands	Bytes	Cycles	Flags
implied	`42`	—	1	2	NZ

SXY

Swap X and Y

Mode	Opcode	Operands	Bytes	Cycles	Flags
implied	`02`	—	1	2	NZ

CLA

Clear accumulator

Mode	Opcode	Operands	Bytes	Cycles	Flags
implied	`62`	—	1	2	—

CLX

Clear X

Mode	Opcode	Operands	Bytes	Cycles	Flags
implied	`82`	—	1	2	—

CLY

Clear Y

Mode	Opcode	Operands	Bytes	Cycles	Flags
implied	`C2`	—	1	2	—

CSL

Clock select low (slow)

Mode	Opcode	Operands	Bytes	Cycles	Flags
implied	`54`	—	1	2	—

CSH

Clock select high (fast)

Mode	Opcode	Operands	Bytes	Cycles	Flags
implied	`D4`	—	1	2	—

SET

Set T flag

Mode	Opcode	Operands	Bytes	Cycles	Flags
implied	`F4`	—	1	2	T

PHX

Push X

Mode	Opcode	Operands	Bytes	Cycles	Flags
implied	`DA`	—	1	2	—

PHY

Push Y

Mode	Opcode	Operands	Bytes	Cycles	Flags
implied	`5A`	—	1	2	—

PLX

Pull X

Mode	Opcode	Operands	Bytes	Cycles	Flags
implied	`FA`	—	1	2	NZ

PLY

Pull Y

Mode	Opcode	Operands	Bytes	Cycles	Flags
implied	`7A`	—	1	2	NZ

INC

Increment

Mode	Opcode	Operands	Bytes	Cycles	Flags
accumulator	`1A`	—	1	2	NZ

DEC

Decrement

Mode	Opcode	Operands	Bytes	Cycles	Flags
accumulator	`3A`	—	1	2	NZ

BRA

Branch always

Mode	Opcode	Operands	Bytes	Cycles	Flags
relative	`80`	rel8	2	4 +t +p	—

STZ

Store zero

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`64`	addr8	2	4	—
zeropage,x	`74`	addr8	2	4	—
absolute	`9C`	addr16	3	5	—
absolute,x	`9E`	addr16	3	5	—

TRB

Test and reset bits

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`14`	addr8	2	6	Z
absolute	`1C`	addr16	3	7	Z

TSB

Test and set bits

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`04`	addr8	2	6	Z
absolute	`0C`	addr16	3	7	Z

BIT

Bit test

Mode	Opcode	Operands	Bytes	Cycles	Flags
immediate	`89`	imm8	2	2	Z
zeropage,x	`34`	addr8	2	4	NZV
absolute,x	`3C`	addr16	3	5	NZV

JMP

Jump

Mode	Opcode	Operands	Bytes	Cycles	Flags
(absolute,x)	`7C`	addr16	3	7	—

ORA

OR accumulator

Mode	Opcode	Operands	Bytes	Cycles	Flags
(indirect)	`12`	addr8	2	7	NZ

AND

AND accumulator

Mode	Opcode	Operands	Bytes	Cycles	Flags
(indirect)	`32`	addr8	2	7	NZ

EOR

Exclusive-OR accumulator

Mode	Opcode	Operands	Bytes	Cycles	Flags
(indirect)	`52`	addr8	2	7	NZ

ADC

Add with carry

Mode	Opcode	Operands	Bytes	Cycles	Flags
(indirect)	`72`	addr8	2	7	NZCV

STA

Store accumulator

Mode	Opcode	Operands	Bytes	Cycles	Flags
(indirect)	`92`	addr8	2	7	—

LDA

Load accumulator

Mode	Opcode	Operands	Bytes	Cycles	Flags
(indirect)	`B2`	addr8	2	7	NZ

CMP

Compare accumulator

Mode	Opcode	Operands	Bytes	Cycles	Flags
(indirect)	`D2`	addr8	2	7	NZC

SBC

Subtract with carry

Mode	Opcode	Operands	Bytes	Cycles	Flags
(indirect)	`F2`	addr8	2	7	NZCV

ST0

Store immediate to VDC address register

Mode	Opcode	Operands	Bytes	Cycles	Flags
immediate	`03`	imm8	2	4	—

ST1

Store immediate to VDC data (low)

Mode	Opcode	Operands	Bytes	Cycles	Flags
immediate	`13`	imm8	2	4	—

ST2

Store immediate to VDC data (high)

Mode	Opcode	Operands	Bytes	Cycles	Flags
immediate	`23`	imm8	2	4	—

TAM

Transfer A to MMU register

Mode	Opcode	Operands	Bytes	Cycles	Flags
immediate	`53`	imm8	2	5	—

TMA

Transfer MMU register to A

Mode	Opcode	Operands	Bytes	Cycles	Flags
immediate	`43`	imm8	2	4	NZ

TST

Test memory bits against immediate

Mode	Opcode	Operands	Bytes	Cycles	Flags
immediate,zeropage	`83`	imm8, addr8	3	7	NZV
immediate,absolute	`93`	imm8, addr16	4	8	NZV
immediate,zeropage,x	`A3`	imm8, addr8	3	7	NZV
immediate,absolute,x	`B3`	imm8, addr16	4	8	NZV

BSR

Branch to subroutine

Mode	Opcode	Operands	Bytes	Cycles	Flags
relative	`44`	rel8	2	8 +t +p	—

TII

Block transfer, increment src + dst

Mode	Opcode	Operands	Bytes	Cycles	Flags
block	`73`	addr16, addr16, addr16	7	17	—

TDD

Block transfer, decrement src + dst

Mode	Opcode	Operands	Bytes	Cycles	Flags
block	`C3`	addr16, addr16, addr16	7	17	—

TIN

Block transfer, increment src, fixed dst

Mode	Opcode	Operands	Bytes	Cycles	Flags
block	`D3`	addr16, addr16, addr16	7	17	—

TIA

Block transfer, increment src, alternate dst

Mode	Opcode	Operands	Bytes	Cycles	Flags
block	`E3`	addr16, addr16, addr16	7	17	—

TAI

Block transfer, alternate src, increment dst

Mode	Opcode	Operands	Bytes	Cycles	Flags
block	`F3`	addr16, addr16, addr16	7	17	—

RMB0

Reset/set memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`07`	addr8	2	7	—

RMB1

Reset/set memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`17`	addr8	2	7	—

RMB2

Reset/set memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`27`	addr8	2	7	—

RMB3

Reset/set memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`37`	addr8	2	7	—

RMB4

Reset/set memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`47`	addr8	2	7	—

RMB5

Reset/set memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`57`	addr8	2	7	—

RMB6

Reset/set memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`67`	addr8	2	7	—

RMB7

Reset/set memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`77`	addr8	2	7	—

SMB0

Reset/set memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`87`	addr8	2	7	—

SMB1

Reset/set memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`97`	addr8	2	7	—

SMB2

Reset/set memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`A7`	addr8	2	7	—

SMB3

Reset/set memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`B7`	addr8	2	7	—

SMB4

Reset/set memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`C7`	addr8	2	7	—

SMB5

Reset/set memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`D7`	addr8	2	7	—

SMB6

Reset/set memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`E7`	addr8	2	7	—

SMB7

Reset/set memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage	`F7`	addr8	2	7	—

BBR0

Branch on memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage,relative	`0F`	addr8, rel8	3	6 +t +p	—

BBR1

Branch on memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage,relative	`1F`	addr8, rel8	3	6 +t +p	—

BBR2

Branch on memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage,relative	`2F`	addr8, rel8	3	6 +t +p	—

BBR3

Branch on memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage,relative	`3F`	addr8, rel8	3	6 +t +p	—

BBR4

Branch on memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage,relative	`4F`	addr8, rel8	3	6 +t +p	—

BBR5

Branch on memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage,relative	`5F`	addr8, rel8	3	6 +t +p	—

BBR6

Branch on memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage,relative	`6F`	addr8, rel8	3	6 +t +p	—

BBR7

Branch on memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage,relative	`7F`	addr8, rel8	3	6 +t +p	—

BBS0

Branch on memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage,relative	`8F`	addr8, rel8	3	6 +t +p	—

BBS1

Branch on memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage,relative	`9F`	addr8, rel8	3	6 +t +p	—

BBS2

Branch on memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage,relative	`AF`	addr8, rel8	3	6 +t +p	—

BBS3

Branch on memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage,relative	`BF`	addr8, rel8	3	6 +t +p	—

BBS4

Branch on memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage,relative	`CF`	addr8, rel8	3	6 +t +p	—

BBS5

Branch on memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage,relative	`DF`	addr8, rel8	3	6 +t +p	—

BBS6

Branch on memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage,relative	`EF`	addr8, rel8	3	6 +t +p	—

BBS7

Branch on memory bit

Mode	Opcode	Operands	Bytes	Cycles	Flags
zeropage,relative	`FF`	addr8, rel8	3	6 +t +p	—

Machines

NEC PC Engine

Sources

Encodings on this page were taken from:

HuC6280 Software Manual — Hudson Soft
HuC6280 Hardware Manual — Hudson Soft