Reference

RCA CDP1802 (COSMAC)

79 mnemonics, 255 encoded forms, operands big-endian. Generated from crates/isa/src/cdp1802.rs.

Cycle counts show the base cost; +p is an extra cycle when an indexed access crosses a page boundary, +t when a branch is taken.

LDN

Load via N

Mode Opcode Operands Bytes Cycles Flags
1 01 — 1 2 —
2 02 — 1 2 —
3 03 — 1 2 —
4 04 — 1 2 —
5 05 — 1 2 —
6 06 — 1 2 —
7 07 — 1 2 —
8 08 — 1 2 —
9 09 — 1 2 —
10 0A — 1 2 —
11 0B — 1 2 —
12 0C — 1 2 —
13 0D — 1 2 —
14 0E — 1 2 —
15 0F — 1 2 —

INC

Increment register

Mode Opcode Operands Bytes Cycles Flags
0 10 — 1 2 —
1 11 — 1 2 —
2 12 — 1 2 —
3 13 — 1 2 —
4 14 — 1 2 —
5 15 — 1 2 —
6 16 — 1 2 —
7 17 — 1 2 —
8 18 — 1 2 —
9 19 — 1 2 —
10 1A — 1 2 —
11 1B — 1 2 —
12 1C — 1 2 —
13 1D — 1 2 —
14 1E — 1 2 —
15 1F — 1 2 —

DEC

Decrement register

Mode Opcode Operands Bytes Cycles Flags
0 20 — 1 2 —
1 21 — 1 2 —
2 22 — 1 2 —
3 23 — 1 2 —
4 24 — 1 2 —
5 25 — 1 2 —
6 26 — 1 2 —
7 27 — 1 2 —
8 28 — 1 2 —
9 29 — 1 2 —
10 2A — 1 2 —
11 2B — 1 2 —
12 2C — 1 2 —
13 2D — 1 2 —
14 2E — 1 2 —
15 2F — 1 2 —

LDA

Load advance

Mode Opcode Operands Bytes Cycles Flags
0 40 — 1 2 —
1 41 — 1 2 —
2 42 — 1 2 —
3 43 — 1 2 —
4 44 — 1 2 —
5 45 — 1 2 —
6 46 — 1 2 —
7 47 — 1 2 —
8 48 — 1 2 —
9 49 — 1 2 —
10 4A — 1 2 —
11 4B — 1 2 —
12 4C — 1 2 —
13 4D — 1 2 —
14 4E — 1 2 —
15 4F — 1 2 —

STR

Store via N

Mode Opcode Operands Bytes Cycles Flags
0 50 — 1 2 —
1 51 — 1 2 —
2 52 — 1 2 —
3 53 — 1 2 —
4 54 — 1 2 —
5 55 — 1 2 —
6 56 — 1 2 —
7 57 — 1 2 —
8 58 — 1 2 —
9 59 — 1 2 —
10 5A — 1 2 —
11 5B — 1 2 —
12 5C — 1 2 —
13 5D — 1 2 —
14 5E — 1 2 —
15 5F — 1 2 —

GLO

Get low byte

Mode Opcode Operands Bytes Cycles Flags
0 80 — 1 2 —
1 81 — 1 2 —
2 82 — 1 2 —
3 83 — 1 2 —
4 84 — 1 2 —
5 85 — 1 2 —
6 86 — 1 2 —
7 87 — 1 2 —
8 88 — 1 2 —
9 89 — 1 2 —
10 8A — 1 2 —
11 8B — 1 2 —
12 8C — 1 2 —
13 8D — 1 2 —
14 8E — 1 2 —
15 8F — 1 2 —

GHI

Get high byte

Mode Opcode Operands Bytes Cycles Flags
0 90 — 1 2 —
1 91 — 1 2 —
2 92 — 1 2 —
3 93 — 1 2 —
4 94 — 1 2 —
5 95 — 1 2 —
6 96 — 1 2 —
7 97 — 1 2 —
8 98 — 1 2 —
9 99 — 1 2 —
10 9A — 1 2 —
11 9B — 1 2 —
12 9C — 1 2 —
13 9D — 1 2 —
14 9E — 1 2 —
15 9F — 1 2 —

PLO

Put low byte

Mode Opcode Operands Bytes Cycles Flags
0 A0 — 1 2 —
1 A1 — 1 2 —
2 A2 — 1 2 —
3 A3 — 1 2 —
4 A4 — 1 2 —
5 A5 — 1 2 —
6 A6 — 1 2 —
7 A7 — 1 2 —
8 A8 — 1 2 —
9 A9 — 1 2 —
10 AA — 1 2 —
11 AB — 1 2 —
12 AC — 1 2 —
13 AD — 1 2 —
14 AE — 1 2 —
15 AF — 1 2 —

PHI

Put high byte

Mode Opcode Operands Bytes Cycles Flags
0 B0 — 1 2 —
1 B1 — 1 2 —
2 B2 — 1 2 —
3 B3 — 1 2 —
4 B4 — 1 2 —
5 B5 — 1 2 —
6 B6 — 1 2 —
7 B7 — 1 2 —
8 B8 — 1 2 —
9 B9 — 1 2 —
10 BA — 1 2 —
11 BB — 1 2 —
12 BC — 1 2 —
13 BD — 1 2 —
14 BE — 1 2 —
15 BF — 1 2 —

SEP

Set program register

Mode Opcode Operands Bytes Cycles Flags
0 D0 — 1 2 —
1 D1 — 1 2 —
2 D2 — 1 2 —
3 D3 — 1 2 —
4 D4 — 1 2 —
5 D5 — 1 2 —
6 D6 — 1 2 —
7 D7 — 1 2 —
8 D8 — 1 2 —
9 D9 — 1 2 —
10 DA — 1 2 —
11 DB — 1 2 —
12 DC — 1 2 —
13 DD — 1 2 —
14 DE — 1 2 —
15 DF — 1 2 —

SEX

Set data register

Mode Opcode Operands Bytes Cycles Flags
0 E0 — 1 2 —
1 E1 — 1 2 —
2 E2 — 1 2 —
3 E3 — 1 2 —
4 E4 — 1 2 —
5 E5 — 1 2 —
6 E6 — 1 2 —
7 E7 — 1 2 —
8 E8 — 1 2 —
9 E9 — 1 2 —
10 EA — 1 2 —
11 EB — 1 2 —
12 EC — 1 2 —
13 ED — 1 2 —
14 EE — 1 2 —
15 EF — 1 2 —

OUT

Output

Mode Opcode Operands Bytes Cycles Flags
1 61 — 1 2 —
2 62 — 1 2 —
3 63 — 1 2 —
4 64 — 1 2 —
5 65 — 1 2 —
6 66 — 1 2 —
7 67 — 1 2 —

INP

Input

Mode Opcode Operands Bytes Cycles Flags
1 69 — 1 2 —
2 6A — 1 2 —
3 6B — 1 2 —
4 6C — 1 2 —
5 6D — 1 2 —
6 6E — 1 2 —
7 6F — 1 2 —

IDL

Idle

Mode Opcode Operands Bytes Cycles Flags
inherent 00 — 1 2 —

IRX

Increment R(X)

Mode Opcode Operands Bytes Cycles Flags
inherent 60 — 1 2 —

RET

Return

Mode Opcode Operands Bytes Cycles Flags
inherent 70 — 1 2 —

DIS

Disable interrupts

Mode Opcode Operands Bytes Cycles Flags
inherent 71 — 1 2 —

LDXA

Load via X and advance

Mode Opcode Operands Bytes Cycles Flags
inherent 72 — 1 2 —

STXD

Store via X and decrement

Mode Opcode Operands Bytes Cycles Flags
inherent 73 — 1 2 —

ADC

Add with carry

Mode Opcode Operands Bytes Cycles Flags
inherent 74 — 1 2 DF

SDB

Subtract D with borrow

Mode Opcode Operands Bytes Cycles Flags
inherent 75 — 1 2 DF

SHRC

Shift right with carry

Mode Opcode Operands Bytes Cycles Flags
inherent 76 — 1 2 DF

SMB

Subtract memory with borrow

Mode Opcode Operands Bytes Cycles Flags
inherent 77 — 1 2 DF

SAV

Save T

Mode Opcode Operands Bytes Cycles Flags
inherent 78 — 1 2 —

MARK

Push X,P to stack

Mode Opcode Operands Bytes Cycles Flags
inherent 79 — 1 2 —

REQ

Reset Q

Mode Opcode Operands Bytes Cycles Flags
inherent 7A — 1 2 Q

SEQ

Set Q

Mode Opcode Operands Bytes Cycles Flags
inherent 7B — 1 2 Q

SHLC

Shift left with carry

Mode Opcode Operands Bytes Cycles Flags
inherent 7E — 1 2 DF

LDX

Load via X

Mode Opcode Operands Bytes Cycles Flags
inherent F0 — 1 2 —

OR

Logical OR

Mode Opcode Operands Bytes Cycles Flags
inherent F1 — 1 2 —

AND

Logical AND

Mode Opcode Operands Bytes Cycles Flags
inherent F2 — 1 2 —

XOR

Exclusive OR

Mode Opcode Operands Bytes Cycles Flags
inherent F3 — 1 2 —

ADD

Add

Mode Opcode Operands Bytes Cycles Flags
inherent F4 — 1 2 DF

SD

Subtract D

Mode Opcode Operands Bytes Cycles Flags
inherent F5 — 1 2 DF

SHR

Shift right

Mode Opcode Operands Bytes Cycles Flags
inherent F6 — 1 2 DF

SM

Subtract memory

Mode Opcode Operands Bytes Cycles Flags
inherent F7 — 1 2 DF

SHL

Shift left

Mode Opcode Operands Bytes Cycles Flags
inherent FE — 1 2 DF

NOP

No operation

Mode Opcode Operands Bytes Cycles Flags
inherent C4 — 1 2 —

LSNQ

Long skip if Q = 0

Mode Opcode Operands Bytes Cycles Flags
inherent C5 — 1 2 —

LSNZ

Long skip if D not zero

Mode Opcode Operands Bytes Cycles Flags
inherent C6 — 1 2 —

LSNF

Long skip if DF = 0

Mode Opcode Operands Bytes Cycles Flags
inherent C7 — 1 2 —

LSKP

Long skip

Mode Opcode Operands Bytes Cycles Flags
inherent C8 — 1 2 —

LSIE

Long skip if interrupts enabled

Mode Opcode Operands Bytes Cycles Flags
inherent CC — 1 2 —

LSQ

Long skip if Q = 1

Mode Opcode Operands Bytes Cycles Flags
inherent CD — 1 2 —

LSZ

Long skip if D zero

Mode Opcode Operands Bytes Cycles Flags
inherent CE — 1 2 —

LSDF

Long skip if DF = 1

Mode Opcode Operands Bytes Cycles Flags
inherent CF — 1 2 —

ADCI

Add with carry immediate

Mode Opcode Operands Bytes Cycles Flags
immediate 7C imm8 2 2 DF

SDBI

Subtract D with borrow immediate

Mode Opcode Operands Bytes Cycles Flags
immediate 7D imm8 2 2 DF

SMBI

Subtract memory with borrow immediate

Mode Opcode Operands Bytes Cycles Flags
immediate 7F imm8 2 2 DF

LDI

Load immediate

Mode Opcode Operands Bytes Cycles Flags
immediate F8 imm8 2 2 —

ORI

OR immediate

Mode Opcode Operands Bytes Cycles Flags
immediate F9 imm8 2 2 —

ANI

AND immediate

Mode Opcode Operands Bytes Cycles Flags
immediate FA imm8 2 2 —

XRI

Exclusive-OR immediate

Mode Opcode Operands Bytes Cycles Flags
immediate FB imm8 2 2 —

ADI

Add immediate

Mode Opcode Operands Bytes Cycles Flags
immediate FC imm8 2 2 DF

SDI

Subtract D immediate

Mode Opcode Operands Bytes Cycles Flags
immediate FD imm8 2 2 DF

SMI

Subtract memory immediate

Mode Opcode Operands Bytes Cycles Flags
immediate FF imm8 2 2 DF

BR

Branch

Mode Opcode Operands Bytes Cycles Flags
short 30 imm8 2 2 —

BQ

Branch if Q = 1

Mode Opcode Operands Bytes Cycles Flags
short 31 imm8 2 2 —

BZ

Branch if D = 0

Mode Opcode Operands Bytes Cycles Flags
short 32 imm8 2 2 —

BDF

Branch if DF = 1

Mode Opcode Operands Bytes Cycles Flags
short 33 imm8 2 2 —

B1

Branch if EF1

Mode Opcode Operands Bytes Cycles Flags
short 34 imm8 2 2 —

B2

Branch if EF2

Mode Opcode Operands Bytes Cycles Flags
short 35 imm8 2 2 —

B3

Branch if EF3

Mode Opcode Operands Bytes Cycles Flags
short 36 imm8 2 2 —

B4

Branch if EF4

Mode Opcode Operands Bytes Cycles Flags
short 37 imm8 2 2 —

NBR

No short branch (skip)

Mode Opcode Operands Bytes Cycles Flags
short 38 imm8 2 2 —

BNQ

Branch if Q = 0

Mode Opcode Operands Bytes Cycles Flags
short 39 imm8 2 2 —

BNZ

Branch if D not zero

Mode Opcode Operands Bytes Cycles Flags
short 3A imm8 2 2 —

BNF

Branch if DF = 0

Mode Opcode Operands Bytes Cycles Flags
short 3B imm8 2 2 —

BN1

Branch if not EF1

Mode Opcode Operands Bytes Cycles Flags
short 3C imm8 2 2 —

BN2

Branch if not EF2

Mode Opcode Operands Bytes Cycles Flags
short 3D imm8 2 2 —

BN3

Branch if not EF3

Mode Opcode Operands Bytes Cycles Flags
short 3E imm8 2 2 —

BN4

Branch if not EF4

Mode Opcode Operands Bytes Cycles Flags
short 3F imm8 2 2 —

LBR

Long branch

Mode Opcode Operands Bytes Cycles Flags
long C0 addr16 3 2 —

LBQ

Long branch if Q = 1

Mode Opcode Operands Bytes Cycles Flags
long C1 addr16 3 2 —

LBZ

Long branch if D = 0

Mode Opcode Operands Bytes Cycles Flags
long C2 addr16 3 2 —

LBDF

Long branch if DF = 1

Mode Opcode Operands Bytes Cycles Flags
long C3 addr16 3 2 —

LBNQ

Long branch if Q = 0

Mode Opcode Operands Bytes Cycles Flags
long C9 addr16 3 2 —

LBNZ

Long branch if D not zero

Mode Opcode Operands Bytes Cycles Flags
long CA addr16 3 2 —

LBNF

Long branch if DF = 0

Mode Opcode Operands Bytes Cycles Flags
long CB addr16 3 2 —

Machines

RCA COSMAC VIP

Sources

Encodings on this page were taken from:

  • User Manual for the CDP1802 COSMAC Microprocessor — RCA