Reference
Instruction reference
One page per CPU, generated from the instruction-set specification the assembler encodes with. A spec change regenerates these pages, and CI fails if a committed page has fallen behind. Each page lists the manuals and datasheets its specification was written from.
| CPU | Mnemonics | Forms | Byte order |
|---|---|---|---|
| MOS 6502 | 56 | 151 | little-endian |
| WDC 65C816 (extension) | 53 | 119 | little-endian |
| Hudson HuC6280 (extension) | 73 | 83 | little-endian |
| Zilog Z80 | 140 | 796 | little-endian |
| Zilog Z80N | 22 | 30 | little-endian |
| Sharp SM83 (Game Boy) | 46 | 504 | little-endian |
| Intel 8080 | 78 | 244 | little-endian |
| Motorola 6800 | 107 | 197 | big-endian |
| RCA CDP1802 (COSMAC) | 79 | 255 | big-endian |
| Intel 8048 (MCS-48) | 58 | 214 | little-endian |
| National SC/MP (INS8060) | 46 | 121 | little-endian |
| Fairchild F8 (3850) | 47 | 253 | big-endian |
| Signetics 2650 | 71 | 245 | big-endian |
| Texas Instruments TMS7000 | 63 | 203 | big-endian |
These CPUs encode an instruction as an opcode word with its operand fields inside it, so they are listed by base opcode and encoding class instead of by form:
| CPU | Instructions | Word order |
|---|---|---|
| TI TMS9900 | 69 | big-endian |
| DEC PDP-11 | 96 | little-endian |
| GI CP1610 | 30 | big-endian |
Motorola 68000, Motorola 6809 and Zilog Z8000 each have a page of their own shape: the 68000 packs operand fields into the opcode word, so its forms give a base word rather than a byte count; the 6809 groups by operand shape, because its indexed mode computes its own length from a postbyte; and the Z8000 is specified family by family, because its families genuinely differ.
Every CPU the assembler has a specification for is documented here.