GI CP1610

30 instructions, words big-endian. Generated from crates/isa/src/cp1610.rs.

This CPU encodes an instruction as an opcode word whose operand fields are bits inside it, so there is no opcode-then-operands table to give. Each instruction has a base — the opcode word with its operand fields zeroed — and a class saying where those fields sit.

Classes

Class	Encoding	Meaning
`Implied`	`base`	Fixed opcode, no operand
`RegUnary`	`base \| reg`	One register R0–R7 in the low three bits
`GetStatus`	`base \| reg`	One register R0–R3 in the low two bits
`RegReg`	`base \| src << 3 \| dst`	Two registers — source in bits 5:3, destination in 2:0
`Shift`	`base \| (count - 1) << 2 \| reg`	Register R0–R3, with a one-or-twice count in bit 2

Instructions

Mnemonic	Base	Class	Summary
HLT	`0000`	`Implied`	Halt until interrupt
SDBD	`0001`	`Implied`	Set double-byte-data mode (prefix)
EIS	`0002`	`Implied`	Enable interrupt system
DIS	`0003`	`Implied`	Disable interrupt system
TCI	`0005`	`Implied`	Terminate current interrupt
CLRC	`0006`	`Implied`	Clear carry
SETC	`0007`	`Implied`	Set carry
NOP	`0034`	`Implied`	No operation
SIN	`0036`	`Implied`	Software interrupt (external)
INCR	`0008`	`RegUnary`	Increment register
DECR	`0010`	`RegUnary`	Decrement register
COMR	`0018`	`RegUnary`	One’s-complement register
NEGR	`0020`	`RegUnary`	Two’s-complement (negate) register
ADCR	`0028`	`RegUnary`	Add carry into register
RSWD	`0038`	`RegUnary`	Restore status word from register
GSWD	`0030`	`GetStatus`	Get status word to register
MOVR	`0080`	`RegReg`	Move register to register
ADDR	`00C0`	`RegReg`	Add register to register
SUBR	`0100`	`RegReg`	Subtract register from register
CMPR	`0140`	`RegReg`	Compare registers
ANDR	`0180`	`RegReg`	AND register with register
XORR	`01C0`	`RegReg`	XOR register with register
SWAP	`0040`	`Shift`	Swap byte halves
SLL	`0048`	`Shift`	Shift logical left
RLC	`0050`	`Shift`	Rotate left through carry
SLLC	`0058`	`Shift`	Shift left, carry gets the bit shifted out
SLR	`0060`	`Shift`	Shift logical right
SAR	`0068`	`Shift`	Shift arithmetic right
RRC	`0070`	`Shift`	Rotate right through carry
SARC	`0078`	`Shift`	Shift arithmetic right, carry gets the bit shifted out

Machines

Mattel Intellivision

Sources

Encodings on this page were taken from:

CP-1600 Microprocessor User’s Manual — General Instrument, 1975